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dippy [2019/12/02 10:01]
admin
dippy [2020/01/07 13:21] (current)
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 Persistance of vision display of bits?   Needs an instruction cycle of > 10Hz.  Would be cool - can see what is going on even if stored in non-visable memory. ​  Slow down and see bits flipping, speed up and see all memory - really cool! Persistance of vision display of bits?   Needs an instruction cycle of > 10Hz.  Would be cool - can see what is going on even if stored in non-visable memory. ​  Slow down and see bits flipping, speed up and see all memory - really cool!
 +
 +Bubble memory? ​ Real bubbles! ​ 2m of polycarbonate tube with internal diameter of 7mm may support a 3mm bubble. ​ If we leave about four bubble diameters so they don't merge (just a guess), then we may fit 128 bits into one tube.  Very visual - I want visual memory if at all possible, https://​hackaday.com/​2019/​12/​20/​tiny-bubbles-in-the-clock/​. ​ As solonoid valves are used for the air bubbles this tilts in the direction of a relay computer...
 +
 +[[wp>​Phosphorescence]] using [[wp>​Strontium aluminate]]. ​ One large circle with (say) 1025+-1 dots of phosphorescent paint (or maybe 32 circles of 33+1 dots so that all registers can be seen). ​ These are read, erased and written using light. A red LED erases, the difference of light levels before and after erasing say whether the dot was charged or not.  On the next clock cycle the dot is written again. ​ Green is the strongest, red LED erases. ​ This has the huge advantage that the memory is visible and the clock speed is independent of the memory - phosphorescence can last hours and we only need minutes. ​ If the disk is static and the read/write head rotates then the memory will be visible. ​ Holes can be punched in the disk radially to the dots to give timings, then the clock is derived from the rotor speed. ​ Alternatively use a tape loop, that's a lot like [[wp>​Colossus_computer|Colossus]].
  
 === Discrete physical options === === Discrete physical options ===
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 I have a two-transistor memory cell which can drive a LED.  It should be possible to store the output on a capacitor and so chain these. ​ The idea is that the capacitor stores the previous output and all the read select lines are pulsed at once, so moving a bit pattern one step down.  This may well require an additional resistor so that the capacitors don't change state whilst the memory cells are updating. I have a two-transistor memory cell which can drive a LED.  It should be possible to store the output on a capacitor and so chain these. ​ The idea is that the capacitor stores the previous output and all the read select lines are pulsed at once, so moving a bit pattern one step down.  This may well require an additional resistor so that the capacitors don't change state whilst the memory cells are updating.
  
-LED strip lights ([[https://​medium.com/​@xudasiy/​the-difference-of-sk6812-sk6812-mini-sk6822-ws2812b-ws2813-ed1f51e6b420|WS2812B family]]) are somewhat of an overkill, but at 5p a memory cell and already wired up it's very tempting, especially if a 32 bit or 64 bit processor. ​  The 4-connector options (GND, VCC, CLK, DATA) e.g. [[https://​cdn-shop.adafruit.com/​datasheets/​APA102.pdf|APA102]] look better than 3 (GND, VCC, DATA) as maybe DATA can be fudged to 0V (black) or VCC (white) on each CLK.  However, [[https://​cpldcpu.wordpress.com/​2016/​12/​13/​sk9822-a-clone-of-the-apa102|APA102]] are hard to come by, at about 17p/bit. The APA102 replacement,​ SK9822 is bad as it needs a signal to display the result. ​ Alternatively,​ use ws2812b/​ws2813 and generate two DIN signals, one for 0 and one for 1, then use transistors to switch in the appropriate signal at the start of the shift register - it's still 450Hz not 17kHz of APA102.+LED strip lights ([[https://​medium.com/​@xudasiy/​the-difference-of-sk6812-sk6812-mini-sk6822-ws2812b-ws2813-ed1f51e6b420|WS2812B family]] or [[https://​hackaday.com/​2019/​03/​26/​can-you-live-without-the-ws2812/​|ws2812 alts]]) are cheating, but at 5p a memory cell and already wired up it's very tempting, especially if a 32 bit or 64 bit processor. ​  The 4-connector options (GND, VCC, CLK, DATA) e.g. [[https://​cdn-shop.adafruit.com/​datasheets/​APA102.pdf|APA102]] look better than 3 (GND, VCC, DATA) as maybe DATA can be fudged to 0V (black) or VCC (white) on each CLK.  However, [[https://​cpldcpu.wordpress.com/​2016/​12/​13/​sk9822-a-clone-of-the-apa102|APA102]] are hard to come by, at about 17p/bit. The APA102 replacement,​ SK9822 is bad as it needs a signal to display the result. ​ Alternatively,​ use ws2812b/​ws2813 and generate two DIN signals, one for 0 and one for 1, then use transistors to switch in the appropriate signal at the start of the shift register - it's still 450Hz not 17kHz of APA102.
  
 ==== Instruction set ==== ==== Instruction set ====
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